lsm6dsox: Add pedometer support#1091
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Signed-off-by: Sebastian Romero <s.romero@arduino.cc>
Signed-off-by: Sebastian Romero <s.romero@arduino.cc>
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Signed-off-by: Sebastian Romero <s.romero@arduino.cc>
Signed-off-by: Sebastian Romero <s.romero@arduino.cc>
Signed-off-by: Sebastian Romero <s.romero@arduino.cc>
Signed-off-by: Sebastian Romero <s.romero@arduino.cc>
dpgeorge
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dpgeorge
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This looks like a good addition, thanks!
Just a few comments which should help make the code a bit smaller.
| _OUTX_L_XL = const(0x28) | ||
| _MLC_STATUS = const(0x38) | ||
| _STEP_COUNTER_L = const(0x62) | ||
| _EMB_FUNC_SRC = const(0x64) |
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These two registers are in the embedded register set, so probably best to move their definition down below, after _EMB_FUNC_INT2.
| _PAGE_RW = const(0x17) | ||
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| _MD1_CFG = const(0x5E) | ||
| _MD2_CFG = const(0x5F) |
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These two are part of the standard register set, so probably best moved up to just after _MLC_STATUS.
| self._write_reg(reg, self._read_reg(reg) | mask) | ||
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| def _clear_bits(self, reg, mask): | ||
| self._write_reg(reg, self._read_reg(reg) & ~mask) |
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I suggest combining these two methods into a general _modify_bits(self, reg, clr, set) method. Then it could be more widely used (and also probably reduce code size); see below.
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| rw_bit = 0x20 if value is None else 0x40 | ||
| # Clear both read and write bits first, then set read (bit 5) or write (bit 6). | ||
| self._write_reg(_PAGE_RW, (self._read_reg(_PAGE_RW) & 0x9F) | rw_bit) |
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This could be self._modify_bits(_PAGE_RW, 0x60, rw_bit).
| if enable: | ||
| self._set_bits(_EMB_FUNC_EN_A, _PEDO_EN_MASK) | ||
| else: | ||
| self._clear_bits(_EMB_FUNC_EN_A, _PEDO_EN_MASK) |
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This could be self._modify_bits(_EMB_FUNC_EN_A, _PEDO_EN_MASK, enable and _PEDO_EN_MASK).
Same with int1_enable and int2_enable below.
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This pull request adds basic support for the LSM6DSOX IMU's built-in pedometer feature in the MicroPython driver, including new register definitions, helper methods, and a usage example. The main changes enable step counting, step detection interrupts, and configuration of debounce steps.